刘坚, 王绩伟, 张文婧. 安全SOC芯片哈希算法多类型复用IP核设计[J]. 微电子学与计算机, 2014, 31(10): 86-89.
引用本文: 刘坚, 王绩伟, 张文婧. 安全SOC芯片哈希算法多类型复用IP核设计[J]. 微电子学与计算机, 2014, 31(10): 86-89.
LIU Jian, WANG Ji-wei, ZHANG Wen-jing. Design of Secure SOC Multi-type and Multiplexing IP Core of Hash Algorithm[J]. Microelectronics & Computer, 2014, 31(10): 86-89.
Citation: LIU Jian, WANG Ji-wei, ZHANG Wen-jing. Design of Secure SOC Multi-type and Multiplexing IP Core of Hash Algorithm[J]. Microelectronics & Computer, 2014, 31(10): 86-89.

安全SOC芯片哈希算法多类型复用IP核设计

Design of Secure SOC Multi-type and Multiplexing IP Core of Hash Algorithm

  • 摘要: 设计了可兼容SHA-1、SHA-224、SHA-256三种算法的IP核.在深入研究算法,对三种算法进行改进和重新设计,加快了运算速度、提高了运算核性能.体现出节省面积,资源优化,移植性好,满足使用不同密码算法用户多层级安全要求和集成度优化的优势.已在多款SOC芯片中作为数字签名的IP核使用,支持双复位、中断以及低功耗模式,运算支持中途读写操作.

     

    Abstract: Based on deep studying interrelation and the similarity of algorithm of SHA-1,SHA-224 and SHA-256,an IP core containing these three kinds of algorithms was developed and redesigned.It speeds up the operation and improves the performance,in particular of saving area,resource optimization and good portability.It meets multilevel security and integration optimization requirements of various clients,supporting double reset,interrupt and low-power mode,as well as reading and writing operations midway.

     

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