Abstract:
This paper presents a low power, low temperature drift fourth order Σ-ΔADC modulator design. The proposed low power Σ-ΔADC modulator is designed on HHGRACE 0.35 μm CZ6H technology, and simulated by HSPICE under different process corner and temperature point, system voltage is 5 V, sampling frequency is 512 kHz, the temperature coefficient of bandgap reference voltage is 25 ppm/℃, the power consumption of fourth-order Σ-ΔADC modulator is about 550 μA.The tapeout chip's function and performance is tested on the test board, and the simulation results are consistent.