Abstract: Based on reversed nested cascade miller compensation(RNCMC), a single pole system of capacitor-free low-dropout regulator is presented. The LDO adopts a variable-gain-buffer that consists of an inverting stage and a variable gain inverting stage to improve the slew rate and the stability of load stepping. A 2.5 V 200 mA capacitor-free LDO for SoC application is targeted by TSMC 0.25 μm CMOS process in this paper. Simulation results shows that the dropout voltage is 150 mV, the LDO's load current is from 1 mA to 200 mA and the LDO can be stable in the range of 0 to 1 μF for output capacitance, the maximum phase margin is up to 86 degrees and the minimum is 76 degrees when the load is at 200 mA.