宋辉, 蒋林, 山蕊, 郭佳乐, 李雪婷. 视频阵列处理器数据访存电路的设计与实现[J]. 微电子学与计算机, 2017, 34(2): 83-86.
引用本文: 宋辉, 蒋林, 山蕊, 郭佳乐, 李雪婷. 视频阵列处理器数据访存电路的设计与实现[J]. 微电子学与计算机, 2017, 34(2): 83-86.
SONG Hui, JIANG Lin, SHAN Rui, GUO Jia-le, LI Xue-ting. Design and Implementation of Data Memory Access Circuit in Video Array Processor[J]. Microelectronics & Computer, 2017, 34(2): 83-86.
Citation: SONG Hui, JIANG Lin, SHAN Rui, GUO Jia-le, LI Xue-ting. Design and Implementation of Data Memory Access Circuit in Video Array Processor[J]. Microelectronics & Computer, 2017, 34(2): 83-86.

视频阵列处理器数据访存电路的设计与实现

Design and Implementation of Data Memory Access Circuit in Video Array Processor

  • 摘要: 为了降低远程数据访问延迟, 提高并行度, 针对视频阵列处理器设计了一种远程数据访存电路, 通过网络适配器将阵列处理器与路由网络相连实现远程数据的访存.通过Xilinx的ZC706系列FPGA开发板测试表明: 该数据访存电路显著提高了远程数据的传送效率, 并且与Intel 80核处理器的2D Mesh网络相比, 可以降低1/3的通信延迟.

     

    Abstract: In order to improve the transmission efficiency of the remote data between the processor and reduce the access latency, a remote data memory access circuit is designed for the video array processor, array processors and routing network will be connected through the network adapter to realize remote data memory access. Through the Xilinx zc706 series FPGA development board test showed that the circuit can significantly improve the transmission efficiency of the remote data, and compared with the 80 core processor of Intel 2D mesh networks, can reduce the 1/3 of the communication delay.

     

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