颜学龙, 王洋冰, 陈寿宏. 基于IEEE1149.1至IEEE1149.7转换器的研究与实现[J]. 微电子学与计算机, 2016, 33(11): 133-136, 141.
引用本文: 颜学龙, 王洋冰, 陈寿宏. 基于IEEE1149.1至IEEE1149.7转换器的研究与实现[J]. 微电子学与计算机, 2016, 33(11): 133-136, 141.
YAN Xue-long, WANG Yang-bing, CHEN Shou-hong. Research on the Converter from IEEE1149.1 to IEEE1149.7[J]. Microelectronics & Computer, 2016, 33(11): 133-136, 141.
Citation: YAN Xue-long, WANG Yang-bing, CHEN Shou-hong. Research on the Converter from IEEE1149.1 to IEEE1149.7[J]. Microelectronics & Computer, 2016, 33(11): 133-136, 141.

基于IEEE1149.1至IEEE1149.7转换器的研究与实现

Research on the Converter from IEEE1149.1 to IEEE1149.7

  • 摘要: IEEE1149.7标准相对于IEEE1149.1标准新增了很多测试与调试的功能, 解决了现今复杂度高的芯片和系统无法测试的问题.在深入地研究IEEE1149.1和IEEE1149.7两种标准的基础上, 利用自上而下的设计方法完成了由IEEE1149.1信号变为IEEE1149.7信号转换器的设计, 在QuartusⅡ平台中通过Verilog语言实现, 将设计应用在FPGA中, 并用QuartusⅡ中嵌入式逻辑分析仪SignalTapⅡ采集FPGA的输出信号.输出结果表明所设计的方案可以将IEEE1149.1信号转化为IEEE1149.7信号, 可用于IEEE1149.7的待测系统进行测试与调试.

     

    Abstract: IEEE1149.7 standard with respect to the IEEE1149.1 standard added a lot of testing and debugging features, to solve the problem of high complexity of today's chips and systems can't be tested. In-depth research foundation IEEE1149.1 and IEEE1149.7 two standards on the use of top-down design method to complete the conversion by the IEEE1149.1 IEEE1149.7 converter design in QuartusⅡ platform by Verilog language the design in FPGA, and SignalTapⅡ embedded logic analyzer capture FPGA output signal in QuartusⅡ. The output results show that the design of the program can transform IEEE1149.1 signal into IEEE1149.7 signal that can be used IEEE1149.7 test system for testing and debugging.

     

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