刘毅超, 赵仲元, 绳伟光, 何卫锋. 多层异构粗粒度可重构处理器的编译器后端设计[J]. 微电子学与计算机, 2016, 33(8): 15-18.
引用本文: 刘毅超, 赵仲元, 绳伟光, 何卫锋. 多层异构粗粒度可重构处理器的编译器后端设计[J]. 微电子学与计算机, 2016, 33(8): 15-18.
LIU Yi-chao, ZHAO Zhong-yuan, SHENG Wei-guang, HE Wei-feng. A Compiler Back-end for Multi-layer Heterogeneous Coarse-Grained Reconfigurable Architectures[J]. Microelectronics & Computer, 2016, 33(8): 15-18.
Citation: LIU Yi-chao, ZHAO Zhong-yuan, SHENG Wei-guang, HE Wei-feng. A Compiler Back-end for Multi-layer Heterogeneous Coarse-Grained Reconfigurable Architectures[J]. Microelectronics & Computer, 2016, 33(8): 15-18.

多层异构粗粒度可重构处理器的编译器后端设计

A Compiler Back-end for Multi-layer Heterogeneous Coarse-Grained Reconfigurable Architectures

  • 摘要: 基于LLVM编译器平台, 针对一种多层异构粗粒度可重构处理器, 设计了完整的任务编译器后端模块.针对这种处理器独特的访存机制, 提出了一种新的中间数据结构ConfigIR, 使得编译器可以完成计算密集型任务在可重构阵列上的调度, 最终生成并行配置信息.对相关计算密集型任务的性能进行测试, 结果表明相对于串行执行, 该编译器管理下的可重构架构可以获得2~3倍的加速.

     

    Abstract: In this paper, we present a novel task compiler back-end based on LLVM compiler framework but targeting a kind of multi-layer heterogeneous CGRA. Aiming at the processor which has distinct way accessing memory, we propose a new data structure called ConfigIR, which can analyze computation intensive programs, schedule parallel tasks and generate configuration codes eventually. Experiment shows that several computation intensive algorithms can get twice or three times speed up than serial processing.

     

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