基于VLIW微处理器的指令存储器高效能组织模型研究
Research on High Efficiency Organization Model of Instruction Memory in Embedded VLIW Processor
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摘要: 为有效解决目前嵌入式微处理器设计中指令存储器功耗大、能效不高的问题,研究了传统指令存储器实现方式的特点,分析了指令存储器功耗和能效随容量变化的规律,提出了基于时钟控制和分块管理的指令存储器高效能组织模型,设计并实现了基于SRAM块矩阵布局方式的指令存储器管理方法.结果表明,本设计能够大幅降低指令存储器功耗,提高指令存储器能效.和传统指令存储器实现方式相比,动态功耗降低了74.93%,能效提高了3.99倍.Abstract: In order to solve the problem of high power consumption and low energy efficiency in the current embedded instruction RAM designs, this paper researches the conventional implementation of embedded instruction RAMS, and analyzes power and efficiency variation with memory capacity. Based on the technique of clock gating and block-dividing management, the high efficiency organization model is put forward, and the management method in a matrix layout is implemented. Compared with traditional embedded instruction RAMs, its power is reduced by 74.93% and energy efficiency increased by 3.99 times.
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