Abstract: Based on the RISC-V open source instruction set and Rocket-Chip open source processor, we propose a convolution neural network acceleration module based on Eyeriss structure and form a complete system with the processor connection. The accelerator structure greatly reduces the time consumption of the convolution layer by performing data reuse in the lateral (convolution core weight), longitudinal (output calculation result) and oblique (input image). In addition, the use of the UCB developed Chisel3 language, on the one hand to generate the system C language simulator for debugging, on the other hand generate Verilog for integrated and layout and routing. Through the LeNet-5 handwritten digital identification network and MNIST data set, we achieved satisfactory results on speed and accuracy.