屈家丽, 贺光辉, 王国兴. 语音识别中卷积神经网络的FPGA实现[J]. 微电子学与计算机, 2018, 35(9): 37-41, 49.
引用本文: 屈家丽, 贺光辉, 王国兴. 语音识别中卷积神经网络的FPGA实现[J]. 微电子学与计算机, 2018, 35(9): 37-41, 49.
QU Jia-li, HE Guang-hui, WANG Guo-xing. FPGA Implementation of Convolutional Neural Network in Speech Recognition[J]. Microelectronics & Computer, 2018, 35(9): 37-41, 49.
Citation: QU Jia-li, HE Guang-hui, WANG Guo-xing. FPGA Implementation of Convolutional Neural Network in Speech Recognition[J]. Microelectronics & Computer, 2018, 35(9): 37-41, 49.

语音识别中卷积神经网络的FPGA实现

FPGA Implementation of Convolutional Neural Network in Speech Recognition

  • 摘要: 针对应用于语音识别中的卷积神经网络, 为了提高能耗比, 将网络在FPGA中进行定制化实现, 并通过PCIe完成了FPGA与主机的交互.对该网络定点仿真结果表明, 整体采用16位定点计算可以在保证精度的情况下有效地减少数据存储量和带宽要求.采用多种复用方式进行卷积层与全连接层的速度优化, 并与流水线结构相结合, 提高系统了的吞吐率, 在系统150 MHz的时钟频率下达到了3 715 fps的速度.

     

    Abstract: A convolutional neural network used in speech recognition is customized in FPGA in order to improve the energy efficiency. PCIe is used to transfer data between the FPGA and PC. A 16-bit fixed data quantization is adopted after analysis and simulation. A variety of data multiplexing methods is used for speed optimization in convolutional layer and fully-connected layer. Pipe-line helps to improve the throughput of the system. This FPGA programs with 150MHz frequency and achieves the speed of 3715fps.

     

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