赵宗国, 李伟, 戴紫彬. 高速可伸缩Montgomery模除器设计技术研究[J]. 微电子学与计算机, 2015, 32(12): 26-30.
引用本文: 赵宗国, 李伟, 戴紫彬. 高速可伸缩Montgomery模除器设计技术研究[J]. 微电子学与计算机, 2015, 32(12): 26-30.
ZHAO Zong-guo, LI Wei, DAI Zi-bin. The Design Technology of High-speed Scalable Montgomery Modular Division Device[J]. Microelectronics & Computer, 2015, 32(12): 26-30.
Citation: ZHAO Zong-guo, LI Wei, DAI Zi-bin. The Design Technology of High-speed Scalable Montgomery Modular Division Device[J]. Microelectronics & Computer, 2015, 32(12): 26-30.

高速可伸缩Montgomery模除器设计技术研究

The Design Technology of High-speed Scalable Montgomery Modular Division Device

  • 摘要: 为解决传统方式计算模除周期数过长、灵活性太差的问题,提出了一种基于原始Montgomery模逆算法的高效Montgomery模除算法.该算法相比于模逆-模乘方式计算模除可减少34%的循环次数.基于该算法设计了同时支持素数域GF(p)和二进制域GF(2n)的模除器硬件结构.在CMOS 0.18 μm typical工艺库下综合,时钟频率可以达到270 MHz.与原始Montgomery模除运算相比,本设计可支持576 bit以内任意长度、单次模除运算需要的时钟周期数可减少15%;与模逆-模乘方式相比,模除速度提高了45%.

     

    Abstract: To solve the problem of long cycle of calculation modular division with traditional way, in this paper, an improved Montgomery modular division algorithm is proposed based on the original Montgomery modular inversion algorithm. The algorithm compared calculation with modular inversion-division way can reduce 34% cycle. A modular division device is designed to operate in both finite fields GF(p) and GF(2n) based on the proposed algorithm. We synthesize the modular division device under 0.18 μm CMOS technology and the clock frequency can reach 270 MHz. Compared with original Montgomery division, the design can support the calculation below 576 bits and can reduce 15% cycle calculating modular division. Comparing with modular inversion-division way, 45% speed of modular division faster can be accelerated.

     

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