赵昌兵, 付方发, 肖立伊. 数字太敏SoC的抗SEU加固设计[J]. 微电子学与计算机, 2017, 34(1): 1-5, 11.
引用本文: 赵昌兵, 付方发, 肖立伊. 数字太敏SoC的抗SEU加固设计[J]. 微电子学与计算机, 2017, 34(1): 1-5, 11.
ZHAO Chang-bing, FU Fang-fa, XIAO Li-yi. SEU-Tolerant Design for Digital Sun Sensor SoC[J]. Microelectronics & Computer, 2017, 34(1): 1-5, 11.
Citation: ZHAO Chang-bing, FU Fang-fa, XIAO Li-yi. SEU-Tolerant Design for Digital Sun Sensor SoC[J]. Microelectronics & Computer, 2017, 34(1): 1-5, 11.

数字太敏SoC的抗SEU加固设计

SEU-Tolerant Design for Digital Sun Sensor SoC

  • 摘要: 针对航天应用中数字式太阳敏感器高可靠性的要求, 对基于Leon3处理器平台的数字式太阳敏感器SoC在RTL级进行抗SEU加固设计.出于加固后整个系统速度和面积的考虑, 本文针对SoC中不同部分采取不同的加固方法, 综合使用了三模冗余、EDAC(Error Detection And Correction)电路、CPU流水线重启和Cache强制不命中等容错方法.使用故障注入的方法测试寄存器文件加固后系统的软错误敏感性, 对寄存器加固效果进行评估.并在FPGA上进行原型实现, 对比加固前后的速度及开销情况.

     

    Abstract: For the high reliability of digital sun sensor in aerospace applications, the SEU-tolerant design for Leon3-based digital sun sensor SoC in RTL level was fulfilled. In considerations of the speed and size of the entire system, we adopt various strengthening methods for different parts of SoC, including triple modular redundancy, EDAC (Error Detection And Correction) circuit, pipeline restart of CPU, forcing cache to miss, etc. in order to evaluate the strengthening effect of registers, we need the soft error sensitivity getting from the fault injection test on the system with register file strengthened. Then, the prototype was implemented in FPGA and compared the speed and overhead with non-strengthened design.

     

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