Abstract: In order to improve the integration of wearable medical chips and reduce thewholepowerconsumption and the process cost, a multi-signal configurable low-power AFE circuit in standard digital technology is proposed, which mainlyadopts Class-C inverters and full compensated depletion-mode MOS-capacitorsto constitutean instrumentation amplifier with configurable high-pass filtering frequency, a low-power configurable gain amplifier and a low-power LPF with configurable bandwidth. In this circuit, Class C inverters and fully complementary depletion region MOS capacitor technology are adopted, and instrument amplifier with configurable high-pass filter function, low-power configurable gain amplifier and low-power low-pass filter with bandwidth configurable module are designed and integrated. The proposed AFE circuit is implemented in SMIC 0.18 μm CMOS process.Simulation results show that the power consumption is 52.8 μW, the CMRR is 76.1 dB, and the input-reference-noise PSD is 3.45 μV / sqrt (Hz).