Abstract: In this paper, we propose a hardware Trojan detection method based on nodes activity state, in view of the low activity nodes of original circuit generate test vectors, Combined with the method of multi-parameter side channel signals to detect Hardware Trojan. The proposed method is verified by simulation and FPGA experiment carried on AES original circuit which is implanted with hardware trojan. The results show that compared with random test vector, the proposed method can improve the transition probability of the trojans of nodes an order of magnitude and increase the sensitivity of the Hardware Trojan detection by 6.75%(simulation), 77.4%(FPGA), detecte the Hardware Trojan whose equivalent area is as small as 10^-4 of the total size of the circuit.