杨博, 孟李林, 陶琼. 基于FPGA的F_P域模乘与模逆的设计与实现[J]. 微电子学与计算机, 2017, 34(5): 54-58.
引用本文: 杨博, 孟李林, 陶琼. 基于FPGA的F_P域模乘与模逆的设计与实现[J]. 微电子学与计算机, 2017, 34(5): 54-58.
YANG Bo, MENG Li-lin, TAO Qiong. Design of Fp Field Modular Multiplication and Modular Inversion Based on FPGA[J]. Microelectronics & Computer, 2017, 34(5): 54-58.
Citation: YANG Bo, MENG Li-lin, TAO Qiong. Design of Fp Field Modular Multiplication and Modular Inversion Based on FPGA[J]. Microelectronics & Computer, 2017, 34(5): 54-58.

基于FPGA的F_P域模乘与模逆的设计与实现

Design of Fp Field Modular Multiplication and Modular Inversion Based on FPGA

  • 摘要: 在椭圆曲线体制中, 有限域的运算效率是至关重要的.针对低端FPGA芯片, 从算法和硬件实现两方面优化有限域中的模乘、模逆运算.改进后的模乘算法减少了一次256 bit的乘法; 在硬件实现时又节省了一次128 bit的乘法.改进后的模逆算法在不增加硬件资源的情况下减少算法迭代次数; 并用减法运算和后续的修正算法代替了256 bit的比较器, 改进后的设计能够打断长的组合链路, 提高资源复用率, 较好地实现了面积和速度的平衡.

     

    Abstract: In elliptic curve system, the operational efficiency of the finite field is essential. In this paper, for the low-end FPGA chip, we optimize finite field modular multiplication and modular inversion from both algorithms and hardware realization. The improved modular multiplication algorithm reduces a 256 bit multiplication and reduces a 128 bit multiplication in hardware implementation. Modular inversion algorithm improved without increasing the hardware resources available to reduce the number of iterations; with subtraction and subsequent correction algorithms instead of 256 bit comparator, improved design can interrupt a combination of long chain, improve resource complex with rates, and achieve a balance of size and speed.

     

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