王晓蕾, 王玉莹, 陈红梅, 尹勇生. 基于过零检测的TIADC时钟失配校准算法[J]. 微电子学与计算机, 2016, 33(5): 72-75, 79.
引用本文: 王晓蕾, 王玉莹, 陈红梅, 尹勇生. 基于过零检测的TIADC时钟失配校准算法[J]. 微电子学与计算机, 2016, 33(5): 72-75, 79.
WANG Xiao-lei, WANG Yu-ying, CHEN Hong-mei, YIN Yong-sheng. Background Timing-Skew Calibration Algorithm for the TIADC Based on Zero-Crossing Detection[J]. Microelectronics & Computer, 2016, 33(5): 72-75, 79.
Citation: WANG Xiao-lei, WANG Yu-ying, CHEN Hong-mei, YIN Yong-sheng. Background Timing-Skew Calibration Algorithm for the TIADC Based on Zero-Crossing Detection[J]. Microelectronics & Computer, 2016, 33(5): 72-75, 79.

基于过零检测的TIADC时钟失配校准算法

Background Timing-Skew Calibration Algorithm for the TIADC Based on Zero-Crossing Detection

  • 摘要: 针对时间交织模数转换器(Time-Interleaved Analog-to-Digital Converter, TIADC)的时钟失配设计了一种基于过零检测的后台校准算法.该算法通过比较通道间采样值过零的个数判断时钟误差的大小, 再利用提取到的误差大小控制可变延时的延时大小对时钟误差进行校正.通过MATLAB建立8位五通道TIADC为模型对算法进行验证, 当fin/fs=0.461时, 仿真结果表明, 经本算法校准后ENOB从5.16位提升到7.88位, SNR从32.8 dB提高到了49.4 dB, 从而验证了该校准算法的正确性和有效性.此外, 该校准算法对输入信号的频率没有严格的要求, 且可以扩展到任意通道数.

     

    Abstract: A background calibration technique, which is based on zero-crossing detection method, for clock mismatch in Time-Interleaved Analog-to-Digital Converter (TIADC) is proposed. The error is achieved by comparing the amount of zero-crossing in channels to control the delay for the purpose of timing skew calibration. The algorithm is verified by an 8 bits 5-channels TI ADC MATLAB model. The simulation result shows that the ENOB rises from 5.16 bits to 7.88 bits, and the SNR rises from 32.8 dB to 49.4 dB at the fin/fs=0.461, which means the correctness and effectiveness of the algorithm is validated. The presented calibration in this paper has no restriction on the input signal frequency, and can be extended to arbitrary number of channels.

     

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