胡建来, 李磊. 一种改进型比例积分环路滤波器的设计[J]. 微电子学与计算机, 2016, 33(6): 92-94, 99.
引用本文: 胡建来, 李磊. 一种改进型比例积分环路滤波器的设计[J]. 微电子学与计算机, 2016, 33(6): 92-94, 99.
HU Jian-lai, LI Lei. An Improved Design of Proportional-Integral Digital Loop Filter[J]. Microelectronics & Computer, 2016, 33(6): 92-94, 99.
Citation: HU Jian-lai, LI Lei. An Improved Design of Proportional-Integral Digital Loop Filter[J]. Microelectronics & Computer, 2016, 33(6): 92-94, 99.

一种改进型比例积分环路滤波器的设计

An Improved Design of Proportional-Integral Digital Loop Filter

  • 摘要: 为改善系统由于非线性Bang-Bang鉴相器的引入而导致的系统非线性, 提出了一种改进型数字环路滤波器, 能够根据相位误差的大小, 自动调整环路系数, 提高了系统线性度.在AMS数模混合电路仿真环境中, 仿真了采用此环路滤波器的时钟数据恢复电路.仿真结果表明, 相比于采用传统环路滤波器的时钟数据恢复电路, 采用该结构的时钟数据恢复电路的线性度最高可提高60%.

     

    Abstract: To improve the linearity of system using nonlinear Bang-Bang phase detector, this paper presents a proposed digital loop filter (DLF) with coefficients that adapt to relative magnitude of the phase error, improved system linearity. In AMS digital and analog simulation environment, clock and data recovery adopting the proposed DLF is simulated. The simulation results shows that the linearity of the clock and data recovery adopting proposed DLF increases by 60% at most compared to adopting conventional proportional-integral DLF.

     

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