基于叠加的图像缩放优化及FPGA实现
An Optimized Image Scaling Based on Superposition and Its FPGA Implemention
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摘要: 针对数字图像缩放处理消耗较多硬件资源的问题, 利用坐标转换和叠加处理的方法, 进行图像缩放的硬件设计, 采用流水线设计, 转换为两种整数倍缩放图像叠加的形式, 使其在FPGA上更加易于实现.最后在Xilinx的XC7A200T芯片上对算法进行验证, 得到数据后用MATLAB显示缩放后图像, 效果良好.Abstract: Aiming at solving the problem of hardware resource consumpution in the feild of image scaling, the hardware design of the image scaling is carried out by using the method of coordinate transformation and superposition.Besides we can make it easy to implement on FPGA in the form of two interger times scaled images overlaying, with the pipeline architecture design.Finally the algorithm is verified on the Xilinx XC7A200T chip and the data is transfromed to images with MATLAB which confirms at can work well.
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