基于存储器内建自测试的全速测试设计
Full-Speed Test Design Based on Memory Built-in Self-test
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摘要: 存储器内建自测试(memory built-in-self-test, MBIST)已成为可测性设计(design-for-testability, DFT)中用以测试嵌入式存储器的重要方法.在一款以太网芯片中基于传统存储器内建自测试, 提出了一种多级流水寄存器的全速测试结构, 减少了测试时的读写时钟周期, 缩短了测试时间, 降低了测试成本.经过仿真验证, 证明了该流水结构设计能够有效提高内建自测试效率.Abstract: Memory built-in-self-test has become a major method to test embedded memory in design-for-testability.Based on a traditional memory built-in-self-test in a Ethernet chip, proposes a multistage pipeline stage full-speed test instruction, decrease read and write clock cycle in test, shorten test time, reduce test cost.After simulation verification, it proves the pipeline stage instruction can raise built-in-self-test efficiency.